NCEP15T14 — N-Channel Super Trench Power MOSFET Datasheet

The NCEP15T14 is a 150 V, 140 A N-channel Super Trench power MOSFET optimized for high-frequency switching and synchronous rectification. It combines very low on-resistance with competitive gate charge to minimize both conduction and switching losses, and is qualified for operation up to 175 °C junction temperature.

MOSFET N-channel_schematic

NCEP15T14 package marking

Key Features

Voltage / Current: V_DS = 150 V, I_D = 140 A (25 °C)
R_DS(on): 5.6 mΩ (typ), 6.2 mΩ (max) at V_GS = 10 V, I_D = 70 A
Gate charge × R_DS(on): excellent Figure-of-Merit for fast switching
Operating junction: up to 175 °C
100% UIS and ΔV_DS tested
Pd: 320 W (at T_C = 25 °C)
Package: TO-220-3L, Pb-free lead finish

Typical Applications

High-frequency DC/DC converters
Synchronous rectification stages

Absolute Maximum Ratings (T_C = 25 °C unless noted)

Parameter	Symbol	Limit	Unit
Drain–Source Voltage	V_DS	150	V
Gate–Source Voltage	V_GS	±20	V
Continuous Drain Current (25 °C)	I_D	140	A
Continuous Drain Current (100 °C)	I_D(100 °C)	100	A
Pulsed Drain Current	I_DM	440	A
Power Dissipation	P_D	320	W
Derating Factor	—	2.1	W/°C
Single Pulse Avalanche Energy	E_AS	1296	mJ
Operating Junction & Storage Temp. Range	T_J, T_STG	−55 to 175	°C

Thermal Characteristics

Parameter	Symbol	Typ / Max	Unit
Thermal Resistance, Junction–to–Case	R_θJC	0.47	°C/W

Electrical Characteristics (T_C = 25 °C unless noted)

Off Characteristics

Parameter	Symbol	Test Conditions	Min	Typ	Max	Unit
Drain–Source Breakdown Voltage	BV_DSS	V_GS=0 V, I_D=250 µA	150	—	—	V
Zero-Gate Voltage Drain Current	I_DSS	V_DS=150 V, V_GS=0 V	—	—	1	µA
Gate–Body Leakage	I_GSS	V_GS=±20 V, V_DS=0 V	—	—	±100	nA

On Characteristics

Parameter	Symbol	Test Conditions	Min	Typ	Max	Unit
Gate Threshold Voltage	V_GS(th)	V_DS=V_GS, I_D=250 µA	2.0	3.0	4.0	V
Drain–Source On-State Resistance	R_DS(on)	V_GS=10 V, I_D=70 A	—	5.6	6.2	mΩ
Forward Transconductance	g_FS	V_DS=10 V, I_D=70 A	70	—	—	S

Dynamic Characteristics

Parameter	Symbol	Test Conditions	Typ	Unit
Input Capacitance	C_iss	V_DS=75 V, V_GS=0, f=1 MHz	5900	pF
Output Capacitance	C_oss	same as above	690	pF
Reverse Transfer Capacitance	C_rss	same as above	7	pF

Switching Performance

Parameter	Symbol	Test Conditions	Typ	Unit
Turn-On Delay	t_d(on)	V_DD=75 V, I_D=70 A, V_GS=10 V, R_G=4.7 Ω	26	ns
Rise Time	t_r	same as above	36	ns
Turn-Off Delay	t_d(off)	same as above	47	ns
Fall Time	t_f	same as above	15	ns
Total Gate Charge	Q_g	V_DS=75 V, I_D=70 A, V_GS=10 V	80	nC
Gate–Source Charge	Q_gs	same as above	32	nC
Gate–Drain Charge	Q_gd	same as above	13	nC

Body Diode Characteristics

Parameter	Symbol	Test Conditions	Typ	Max	Unit
Diode Forward Voltage	V_SD	V_GS=0, I_F=I_S	—	1.2	V
Diode Forward Current	I_S	—	—	140	A
Reverse Recovery Time	t_rr	T_J=25 °C, I_F=I_S, di/dt=100 A/µs	140	—	ns
Reverse Recovery Charge	Q_rr	same as above	498	—	nC

Notes: (1) Repetitive rating limited by max junction temperature. (2) Surface-mount on FR-4, t ≤ 10 s. (3) Pulse test: PW ≤ 300 µs, Duty ≤ 2%. (4) Guaranteed by design. (5) E_AS at T_J=25 °C, V_DD=50 V, V_G=10 V, L=0.5 mH, R_g=25 Ω.

Test Circuits

Single-Pulse Avalanche Energy (EAS) Test Circuit
Gate Charge (Q_g) Test Circuit
Switching Time Test Circuit

Typical Electrical & Thermal Characteristics

The following figures (at representative operating points) illustrate device behavior:

Figure 1: Output Characteristics (I_D vs V_DS)
Figure 2: Transfer Characteristics (I_D vs V_GS)
Figure 3: R_DS(on) vs I_D
Figure 4: Normalized R_DS(on) vs Junction Temperature
Figure 5: Gate Charge (Q_g)
Figure 6: Body Diode Forward Characteristics
Figure 7: Capacitances vs V_DS (C_iss, C_oss, C_rss)
Figure 8: Safe Operating Area (SOA)
Figure 9: Power Derating vs T_J
Figure 10: Current Derating vs T_J
Figure 11: Normalized Maximum Transient Thermal Impedance

Package Information — TO-220-3L

Mechanical dimensions are provided for PCB footprint and mechanical integration.

Symbol	Dimensions in mm		Dimensions in inches
Symbol	Min	Max	Min	Max
A	4.400	4.600	0.173	0.181
A1	2.250	2.550	0.089	0.100
b	0.710	0.910	0.028	0.036
b1	1.170	1.370	0.046	0.054
c	0.330	0.650	0.013	0.026
c1	1.200	1.400	0.047	0.055
D	9.910	10.250	0.390	0.404
E	8.950	9.750	0.352	0.384
E1	12.650	12.950	0.498	0.510
e	2.540 (TYP)		0.100 (TYP)
e1	4.980	5.180	0.196	0.204
F	2.650	2.950	0.104	0.116
H	7.900	8.100	0.311	0.319
h	0.000	0.300	0.000	0.012
L	12.900	13.400	0.508	0.528
L1	2.850	3.250	0.112	0.128
V	7.500 (REF)		0.295 (REF)
Φ (Hole Ø)	3.400	3.800	0.134	0.150

Design & Usage Notes

Observe the Safe Operating Area (SOA) for pulsed operation and thermal limits.
For lowest losses, drive gate at 10–12 V and keep loop inductances small to reduce switching stress.
Heatsinking is required to realize the specified 320 W dissipation (T_C=25 °C).
Body diode recovery (t_rr≈140 ns) should be considered in hard-commutation designs.

Legal & Reliability Notices

Not intended for life-support or other ultra-high-reliability applications. Device specifications apply to the component in isolation; verify performance in the end system. Data subject to change without notice.